NXP QorIQ is a family of networking-focused processors built on PowerPC and ARM Layerscape cores, ranging from dual-core parts up to many-core SoCs. Each integrates Ethernet, packet acceleration, and hardware security, and they ship in networking, aerospace, defense, and industrial systems.
We have brought wolfIP, our compact TCP/IP stack, to the NXP QorIQ family running bare-metal under wolfBoot. One static, no-malloc core rides on whatever Ethernet MAC each part provides, from PowerPC big-endian FMan and eTSEC to ARM little-endian ENETC. It is live on hardware across both ends of the family. The targets are the platforms where QorIQ silicon actually ships: avionics, defense, and industrial control.
Features
- Full IPv4 stack: ARP, ICMP, UDP, TCP, DHCP, DNS, TFTP, HTTP/HTTPS, and optional IGMPv3 multicast.
- BSD-style socket API: familiar, callback-driven, and designed to sit directly on a MAC driver with no OS underneath. No RTOS networking subsystem is required.
- Zero dynamic memory: no malloc/calloc anywhere in the core. Sockets, buffers, ARP tables, and timers are compile-time-sized arrays inside a single static struct wolfIP; driver rings and packet buffers are static, cache-line-aligned arrays. Deterministic footprint, no heap fragmentation.
- Small code size: a compact core plus one small per-MAC driver layer (a few hundred lines each), run in polled mode with buffer-descriptor rings in DDR. No QMan/BMan/DPAA datapath is pulled in.
- Endianness-aware: the same core runs on big-endian PowerPC (host order already is network order) and little-endian AArch64, selected at compile time.
- Retargetable without source edits: board parameters (CCSRBAR, MAC index, PHY address, interface mode) all override from CFLAGS.
- Safety-critical fit: static allocation and deterministic memory give identical behavior every run. That is the property certification regimes such as DO-178C and IEC 61508 reward.
- Secure boot-to-TLS on one chip: paired with wolfBoot and wolfSSL, wolfIP completes a secure boot, crypto, and networking stack on the same silicon.
Hardware supported
| SoC | Core | Width / Endian | Ethernet IP | Status |
|---|---|---|---|---|
| P1021 | e500v2 (dual | 32-bit, big-endian | eTSEC / QUICC UCC | Port complete, build-validated |
| T1024 | e5500 (dual) | 64-bit, big-endian | FMan / mEMAC | Build-validated (shares the FMan driver) |
| T1040 | e5500 (quad) | 64-bit, big-endian | FMan / mEMAC + L2 switch | Hardware-verified: DHCP + WOLFIP_TEST PASS |
| T2080 | e6500 (quad, threaded) | 64-bit, big-endian | FMan / mEMAC | Hardware-verified on two boards: DHCP + TFTP + ~123/62 Mbps |
| LS1028A | Cortex-A72 (dual) | 64-bit, little-endian | ENETC + TSN switch | Hardware-verified: DHCP + ~62/30 MB/s + wolfCrypt |
One driver per MAC family covers the whole lineup: the FMan mEMAC on the T-series (big-endian CCSR access with sync/isync barriers), the integrated-endpoint ENETC on Layerscape (little-endian over a PCIe-style ECAM root complex), and eTSEC / QUICC-Engine UCC on the low end. The T2080 was verified on two independent boards. The Curtiss-Wright VPX3-152 uses an AR8031 PHY over SGMII, and the NAII 68PPC2 uses a Marvell PHY over RGMII, validating both interface modes from one source tree. The LS1028A runs the full wolfCrypt self-test and benchmark alongside the stack, with AES, SHA-2/3, and ECC asm-accelerated on the A72’s ARMv8 crypto extensions.
Performance
Each port runs a TCP throughput benchmark (WOLFIP_SPEED_TEST) from the polled, single-threaded stack, driven by nc from a host on the same subnet. RX has the board receive; TX has it source. Figures are single-run.
| Board (SoC) | MAC / mode | TCP RX | TCP TX |
|---|---|---|---|
| Curtiss-Wright VPX3-152 (T2080) | FMan mEMAC, SGMII | ~123 Mbps (15.4 MB/s) | ~62 Mbps (7.8 MB/s) |
| LS1028A-RDB | ENETC | ~497 Mbps (62 MB/s) | ~242 Mbps (30 MB/s) |
The loop uses no zero-copy and no interrupt coalescing, so there is headroom left on the wire. The LS1028A ENETC clears roughly four times the PowerPC FMan boards, reflecting its wider datapath and the A72’s cache-coherent DMA.
Because each MAC family already has a driver, porting to other flavors of the QorIQ line should be trivial. A new part that reuses one of these MACs is mostly a matter of board parameters (CCSRBAR, MAC index, PHY address, interface mode), all set from CFLAGS with no source changes. If a specific QorIQ device is of interest to you, reach out and we can help bring it up.
The work is up for review in two pull requests: the QorIQ MAC drivers in wolfIP (wolfSSL/wolfip#136) and the board bring-up plus test-app in wolfBoot (wolfSSL/wolfBoot#800).
Building on QorIQ? We would like to hear from you.
If you have questions about any of the above, please contact us at facts@wolfssl.com or call us at +1 425 245 8247.
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